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 ICX085AK
Diagonal 11mm (Type 2/3) Progressive Scan CCD Image Sensor with Square Pixel for Color Cameras
Description The ICX085AK is a diagonal 11mm (Type 2/3) interline CCD solid-state image sensor with a square pixel array. Progressive scan allows all pixels signals to be output independently within approximately 1/12 second. This chip features an electronic shutter with variable charge-storage time which makes it possible to realize full-frame still image without a mechanical shutter. High resolution and high color reproductivity are achieved through the use of R, G, B primary color mosaic filters. Further, high sensitivity and low dark current are achieved through the adoption of HAD (HoleAccumulation Diode) sensors. This chip is suitable for image input applications such as still cameras which require high resolution. 20 pin DIP (Ceramic)
Pin 1 1
Features V * Progressive scan allows individual readout of the image signals from all pixels. * High vertical resolution (1024TV-lines) still image 4 without a mechanical shutter. 56 H * Square pixel unit cell Pin 11 * Aspect ratio 5:4 * Horizontal drive frequency: 20.25MHz Optical black position * Reset gate bias is not adjusted. * Substrate voltage: 5.5 to 12.5V (Top View) * R, G, B primary color mosaic filters on chip * Continuous variable-speed shutter * High resolution, high color reproductivity, high sensitivity, low dark current * Low smear * Excellent antiblooming characteristics * Horizontal register: 5V drive Device Structure * Interline CCD image sensor * Image size: Diagonal 11mm (Type 2/3) * Number of effective pixels: 1300 (H) x 1030 (V) approx. 1.3M pixels * Total number of pixels: 1360 (H) x 1034 (V) approx. 1.4M pixels * Chip size: 10.0mm (H) x 8.7mm (V) * Unit cell size: 6.7m (H) x 6.7m (V) * Optical black: Horizontal (H) direction: Front 4 pixels, rear 56 pixels Vertical (V) direction: Front 3 pixels, rear 1 pixel * Number of dummy bits: Horizontal 24 Vertical 1 * Substrate material: Silicon
3
Wfine CCD is a registered trademark of Sony Corporation. Represents a CCD adopting progressive scan, primary color filter and square pixel. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
-1-
E96414D99
ICX085AK
Block Diagram and Pin Configuration (Top View)
GND VOUT GND GND CGG V1 V2
2 B G B G B G Note)
NC
10
9
8
7
6
5
4
3
G
B G B G B G
G R G R G R
Vertical register
R G R G R
Horizontal register Note) 11 12 13 14 15 16 17 18 19 20 : Photo sensor
SUB
VRD
RG
GND
GND
Pin Description Pin No. 1 2 3 4 5 6 7 8 9 10 Symbol V3 V2 V1 VL GND GND NC CGG GND VOUT Output amplifier gate1 GND Signal output Description Vertical register transfer clock Vertical register transfer clock Vertical register transfer clock Protective transistor bias GND GND Pin No. 11 12 13 14 15 16 17 18 19 20 Symbol VRD VDD GND SUB NC NC RG GND H1 H2 Reset gate clock GND Horizontal register transfer clock Horizontal register transfer clock Description Reset drain power supply Supply voltage GND Substrate (overflow drain)
1 DC bias is applied within the CCD, so that this pin should be grounded externally through a capacitance of 1F or more.
VDD
-2-
H1
H2
NC
NC
V3
1
VL
ICX085AK
Absolute Maximum Ratings Item Substrate voltage SUB-GND Supply voltage Vertical clock input voltage VDD, VOUT, VRD, CGG-GND VDD, VOUT, VRD, CGG-SUB V1, V2, V3-GND V1, V2, V3-SUB Ratings -0.3 to +55 -0.3 to +18 -55 to +9 -15 to +16 to +10 to +15 to +16 -16 to +16 -10 to +15 -55 to +10 -65 to +0.3 -0.3 to +27.5 -0.3 to +20.5 -0.3 to +17.5 -30 to +80 -10 to +60 Unit V V V V V V V V V V V V V V C C 1 Remarks
Voltage difference between vertical clock input pins Voltage difference between horizontal clock input pins H1, H2-V3 H1, H2-GND H1, H2-SUB VL-SUB V2, V3-VL RG-GND V1, H1, H2, GND-VL Storage temperature Operating temperature 1 +24V (Max.) when clock width < 10s, clock duty factor < 0.1%.
-3-
ICX085AK
Bias Conditions Item Supply voltage Substrate voltage adjustment range Protective transistor bias DC Characteristics Item Supply current Symbol IDD Min. Typ. 6 Max. 8 Unit mA Remarks Symbol VDD VSUB VL Min. 14.55 5.5 2 Typ. 15.0 Max. 15.45 12.5 Unit V V 1 Remarks
1 Indications of substrate voltage (VSUB) setting value The setting value of the substrate voltage is indicated on the back of image sensor by a special code. Adjust the substrate voltage (VSUB) to the indicated voltage. VSUB code - two characters indication Integer portion Decimal portion Integer portion of code and optimal setting correspond to each other as follows. Integer portion of code Optimal setting A 5 C 6 d 7 E 8 f 9 G 10 h 11 J 12
"G5" VSUB = 10.5V 2 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same supply voltage as the VL power supply for the V driver should be used. Clock Voltage Conditions Item Readout clock voltage Symbol VVT VVH02 VVH1,VVH2,VVH3 VVL1,VVL2,VVL3 V1, V2, V3 Vertical transfer clock | VVL1-VVL3 | voltage VVHH VVHL VVLH VVLL Horizontal transfer clock voltage VH VHL VRG Reset gate clock voltage VRGLH-VRGLL VRGH Substrate clock voltage VSUB VDD +0.4 21.5 VDD +0.6 22.5 4.75 -0.05 4.5 5.0 0 5.0 Min. 14.55 -0.05 -0.2 -8.0 6.8 Typ. 15.0 0 0 -7.5 7.5 Max. Unit 15.45 0.05 0.05 -7.0 8.05 0.1 0.5 0.5 0.5 0.5 5.25 0.05 5.5 0.8 VDD +0.8 23.5 -4- V V V V V V V V V V V V V V V V Waveform diagram 1 2 2 2 2 2 2 2 2 2 3 3 4 4 4 5 Input through 0.01F capacitance Low-level coupling High-level coupling High-level coupling Low-level coupling Low-level coupling VVL = (VVL1 + VVL3)/2 VVH = VVH02 Remarks
ICX085AK
Clock Equivalent Circuit Constant Item Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Capacitance between horizontal transfer clock and GND Capacitance between horizontal transfer clocks Capacitance between reset gate clock and GND Capacitance between substrate clock and GND Vertical transfer clock series resistor Vertical transfer clock ground resistor Horizontal transfer clock series resistor Reset gate clock series resistor Symbol CV1 CV2, CV3 CV12 CV23 CV31 CH1 CH2 CHH CRG CSUB R1, R2, R3 RGND RH1, RH2 RRG Min. Typ. 5000 10000 1200 100 3300 82 68 22 6 800 30 30 10 20 Max. Unit pF pF pF pF pF pF pF pF pF pF Remarks
V1
R1
CV12 CV1 RGND CV2
R2
V2
RH1 H1 CHH
RH2 H2
Cv31
CV3
Cv23 CH1 CH2
R3 V3
Vertical transfer clock equivalent circuit
Horizontal transfer clock equivalent circuit
RRG RG
CRG
Reset gate clock equivalent circuit
-5-
ICX085AK
Drive Clock Waveform Conditions (1) Readout clock waveform
VT 100% 90%
II II
M M 2 tf 0V
VVT 10% 0% tr twh
(2) Vertical transfer clock waveform
V1 VVHL VVH1 VVHH VVH
VVLH VVL01 VVL1 VVLL V2 VVH02 VVHH VVHL VVH2 VVL
VVH
VVLH VVL2 VVLL V3 VVHL VVH3 VVL
VVHH
VVH
VVL03 VVLL
VVLH
VVL
VVH = VVH02 VVL = (VVL01 + VVL03) /2
VV1 = VVH1 - VVL01 VV2 = VVH02 - VVL2 VV3 = VVH3 - VVL03
-6-
ICX085AK
(3) Horizontal transfer clock waveform
H1, H2
tr
twh
tf
90%
VH 10% VHL
twl
(4) Reset gate clock waveform
RG tr twh tf VRGH twl RG waveform Point A VRG VRGL + 0.5V VRGLH VRGL VRGLL
H1 waveform 2.5V
VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL) /2 Assuming VRGH is the minimum value during the interval twh, then: VRG = VRGH - VRGL (5) Substrate clock waveform
SUB 100% 90%
M V SUB 10% 0% M 2 tf
VSUB
tr
twh
-7-
ICX085AK
Clock Switching Characteristics Item Readout clock Vertical transfer clock Horizontal transfer clock During imaging Symbol VT V1, V2, V3 H1 H2 15 16 18 19 15 15 19 18 6 6 0.01 0.01 7 8 37.9 2.5 0.5 10.6 10.6 twh twl tr tf Unit s 110 6 6 0.01 0.01 2.5 0.5 10.6 10.6 ns ns Remarks During readout 1 2
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 4.6 5.0 0.5 52.5 0.5
During H1 parallel-serial H2 conversion RG SUB
s ns s During drain charge
Reset gate clock Substrate clock
1.8 2.1
1 When vertical transfer clock driver CXD1268M x 2 is used. 2 tf tr - 2ns, and the cross-point voltage (VCR) for the H1 rising side of the H1 and H2 waveforms must be at least 2.5V.
two Item Horizontal transfer clock Symbol H1, H2 Min. Typ. Max. 13.0 15.5 Unit ns Remarks 3
3 The overlap period for twh and twl of horizontal transfer clocks H1 and H2 is two.
-8-
ICX085AK
Image Sensor Characteristics Item G sensitivity Sensitivity comparison Saturation signal Smear Video signal shading Uniformity between video signal channels Dark signal Dark signal shading Line crawl G Line crawl R Line crawl B Lag R B Symbol Sg Rr Rb Vsat Sm SHg Srg Sbg Vdt Vdt Lcg Lcr Lcb Lag Min. 890 0.4 0.4 400 0.005 0.008 20 25 8 8 8 4 3.8 3.8 3.8 0.5 Typ. 1100 0.5 0.5 0.55 0.55 Max.
(1/12 second accumulation mode, Ta = 25C) Unit mV Measurement method 1 1 1 mV % % % % % mV mV % % % % 2 3 4 4 5 5 6 7 8 8 8 9 Ta = 60C Ta = 60C Zone 0 and I Zone 0 to II' Ta = 60C Remarks
Zone Definition of Video Signal Shading
1300 (H) 10 10 3 H 8 V 10 H 8
1030 (V)
Zone 0, I Zone II, II' V 10
3
Ignored region Effective pixel region
Measurement System
CCD signal output [A]
Gr/Gb CCD C.D.S AMP S/H R/B S/H
R/B channel signal output [C] Gr/Gb channel signal output [B]
Note) Adjust the amplifier gain so that the gain between [A] and [B], and between [A] and [C] equals 1. -9-
ICX085AK
Image Sensor Characteristics Measurement Method Measurement conditions 1) In the following measurements, the substrate voltage is set to the value indicated on the device, and the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of the Gr/Gb signal output or the R/B signal output of the measurement system. Color coding and readout of this image sensor Gb R Gb R B Gr B Gr Gb R Gb R B Gr B Gr The primary color filters of this image sensor are arranged in the layout shown in the figure on the left (Bayer arrangement). Gr and Gb denote the G signals on the same line as the R signal and the B signal, respectively.
Horizontal register Color Coding Diagram All pixels signals are output successively in a 1/12s period. The R signal and Gr signal lines and the Gb signal and B signal lines are output successively.
- 10 -
ICX085AK
Definition of standard imaging conditions 1) Standard imaging condition I : Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source ) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) Standard imaging condition II : Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. G sensitivity, sensitivity comparison Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/80s, measure the signal outputs (VGr, VGb, VR and VB) at the center of each Gr, Gb, R and B channel screens, and substitute the values into the following formula. VG = (VGr + VGb)/2 Sg = VG x 80 [mV] 12 Rr = VR/VG Rb = VB/VG 2. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with the average value of the Gr signal output, 150mV, measure the minimum values of the Gr, Gb, R and B signal outputs. 3. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, first adjust the average value of the Gr signal output to 150mV. Measure the average values of the Gr signal output, Gb signal output, R signal output and B signal output (Gra, Gba, Ra and Ba), and then adjust the luminous intensity to 500 times the intensity with average value of the Gr signal output, 150mV. After the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value (VSm [mV]), independent of the Gr, Gb, R and B signal outputs, and substitute the values into the following formula. Sm = VSm / Gra + Gba + Ra + Ba 1 x x 1 x 100 [%] (1/10V method conversion value) 4 500 10
4. Video signal shading Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Gr signal output is 150mV. Then measure the maximum (Grmax [mV]) and minimum (Grmin [mV]) values of the Gr signal output and substitute the values into the following formula. SHg = (Grmax - Grmin)/150 x 100 [%]
- 11 -
ICX085AK
5. Uniformity between video signal channels After measuring 4, measure the maximum (Rmax [mV]) and minimum (Rmin [mV]) values of the R signal and the maximum (Bmax [mV]) and minimum (Bmin [mV]) values of the B signal, and substitute the values into the following formula. Srg = (Rmax - Rmin)/150 x 100 [%] Sbg = (Bmax - Bmin)/150 x 100 [%] 6. Dark signal Measure the average value of the signal output (Vdt [mV]) with the device ambient temperature 60C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 7. Dark signal shading After measuring 6, measure the maximum (Vdmax [mV]) and minimum (Vdmin [mV]) values of the dark signal output and substitute the values into the following formula. Vdt = Vdmax - Vdmin [mV] 8. Line crawl Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Gr signal output is 150mV, and then insert R, G, and B filters and measure the difference between G signal lines (Glr, Glg, Glb [mV]) as well as the average value of the G signal output (Gar, Gag, Gab). Substitute the values into the following formula. Lci = Gli x 100 [%] (i = r, g, b) Gai 9. Lag Adjust the Gr signal output value generated by strobe light to 150mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Vlag). Substitute the value into the following formula. Lag = (Vlag/150) x 100 [%]
FLD
SG Light Strobe light timing
Gr signal output 150mV Output
Vlag (Lag)
- 12 -
Drive Circuit
15V
100k 0.1
-7.5V
22/16V
5V
22/20V 2SK523 1/10V 2.7k 47
CXD1268M x2
0.1
22/10V
XV2 XSG
1 2 N.C. 3 4 N.C. 5 6 7 N.C. 8 9 20 19 18 17 N.C. 16 15 14 N.C. 13 12 11
10
CCD OUT
XV1 XV3 1 2 3 4 5 6 7 8 9 10
22/16V
20 19 18 17 16 15 14 13 12 11
1M 3.3/20V 100k 3.3/16V 0.01
22/20V N.C.
1 2 3 4 5 6 7 N.C. 8 9 N.C. 10
20 N.C. 19 N.C. 18 17 16 15 N.C. 14 N.C. 13 12 N.C. 11
AC04
AC04
XH2
0.01
ICX085AK
XH1 RG
H2 H1 GND RG NC NC SUB GND VDD VRD
1/20V
- 13 -
1/35V
VSUB XSUB
CXD1267AN
V3 V2 V1 VL GND GND NC CGG GND VOUT
ICX085 (BOTTOM VIEW)
ICX085AK
Spectral Sensitivity Characteristics (Includes lens characteristics, excludes light source characteristics)
1 0.9 R 0.8 B 0.7 G
Relative Response
0.6 0.5 0.4 0.3 0.2 0.1 0 400
500 Wave Length [nm]
600
700
- 14 -
Sensor Readout Clock Timing Chart
HD 4.0s (81 bits) 5.0s (102 bits)
33.7s (683 bits)
SG
- 15 -
V1
V2
V3
ICX085AK
Drive Timing Chart (Vertical Sync)
VD
HD
5
10
15
SG
V1
V2
V3 1030 1031 12345
CCD OUT
1044 1
20
- 16 -
ICX085AK
Drive Timing Chart (Horizontal Sync)
HD
CLK
297 321 326
H1
232 1 24
1
1616 1
H2
RG
SHP
- 17 -
57 1 19 1 1 1 38 1 1 167 42 1 57 57
SHD
65 1
65
1
V1
175 156
1
V2
V3
1
137
SUB
1
23
19
CCD OUT OPB (4 bits)
OPB (56 bits)
ICX085AK
ICX085AK
Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the package temperature does not exceed 80C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Operate in clean environments (around class 1000 is appropriate). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. e) When a protective tape is applied before shipping, just before use remove the tape applied for electrostatic protection. Do not reuse the tape. 4) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the imageplane may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. 5) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. 6) CCD image sensors are precise optical equipment that should not be subject to too much mechanical shocks.
- 18 -
Package Outline
Unit: mm
20pin DIP (800mil)
0 to 9
11 A D
C
31.0 0.4 27.0 0.3
+ 0.25 2-2.50 0
20
~
~
2R3 .0
26.0
5.0
B + 0.15 2.00 0 (Reference Hole) 0.35
3.2 0.3
1.0
0.3
M
5.5 0.2
- 19 -
0.46 1.27
1. "A" is the center of the effective image sensor area. 2. A straight line "B" which passes through the centers of the reference hole and the elongated hole is the reference axis of vertical direction. 3. A straight line "C" which passes through the center of the reference hole at right angles to vertical reference line "B" is the reference axis of horizontal direction. 4. The bottom "D" is the height reference. (Two points are specified.) 5. The center of the effective image area, specified relative to the reference hole is (H, V) = (13.15, 5.0) 0.15mm. 6. The angle of rotation relative to the reference line "B" is less than 1. 7. The height from the bottom "D" to the effective image area is 1.46 0.15mm. 8. Planar orientation of the effective image area relative to the bottom "D" is less than 60m. 9. The thickness of the cover glass is 0.75mm and the refractive index is 1.5.
ICX085AK
1Pin Index
2.54
PACKAGE STRUCTURE
PACKAGE MATERIAL
Ceramic
LEAD TREATMENT
GOLD PLATING
LEAD MATERIAL
42 ALLOY
PACKAGE WEIGHT
5.9g
0.25
1 13.15 0.5 10 26.00 0.25
+ 0.15 2.00 0 x 2.5 (Elongated Hole)
(AT STAND OFF)
H
20.2 0.3
V
20.32


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